Field of the Invention
The present invention relates to a semiconductor package, and in particular, to a high density flip chip package.
Description of the Related Art
In order to ensure miniaturization and multi-functionality of electronic products or communication devices, semiconductor packages are required to be small in size, multi-pin connection, high speed, and high functionality. Increased Input-Output (I/O) pin counts combined with the increased demand for high-performance ICs has led to the development of flip chip packages.
Flip-chip technology uses bumps on chip to interconnect the package media such as a package substrate. The flip-chip is bonded face down to the package substrate through the shortest path. These technologies can be applied not only to single-chip packaging, but also to higher or integrated levels of packaging in which the packages are larger and to more sophisticated substrates that accommodate several chips to form larger functional units. The flip-chip technique, using an area array, has the advantage of achieving a higher density of interconnection to the device and a very low inductance interconnection to the package. However, the increased amount of input/output connections of a multi-functional flip-chip package may induce thermal electrical problems, for example, problems with heat dissipation, cross talk, signal propagation delay, electromagnetic interference for RF circuits, etc. The thermal electrical problems may affect the reliability and quality of products.
Thus, a novel high-density flip chip package is desirable.